The present invention relates to a D/A (i.e., Digital/Analog) converter and an output offset adjustor for an electronic circuit and, more particularly, to a circuit such as a portable communication terminal unit which includes a D/A converter formed on a semiconductor integrated circuit device operating under low voltage and with low power consumption, to adjust the output offset of an electronic circuit having a plurality of precise and stable analog signal outputs.
In the prior art, the so-called "current drive type D/A converter" is equipped with a plurality of current sources having substantially different current values for selectively validating current sources according to digital signals of a predetermined bit, to produce analog currents corresponding to the digital signals. There is also a portable communication terminal unit which has such a D/A converter packaged therein.
The current drive type D/A converter is disclosed on pp. 128 to 129 of Digest of Technical Papers of International Solid State Circuits Conference, issued on Feb. 14, 1991.
There may be the case in which an undesired offset is present in the output of a circuit due to the dispersion of the characteristics of elements composing the circuit. This offset may be such that the reference level of the output waveform of the circuit is different from that expected. There are two methods of adjusting this offset. In the first method the positive and negative components of AC signals outputted from an electronic circuit are integrated for a relatively long time so that low frequency components are obtained, i.e., the approximate DC components are negatively fed back in a sequential manner to a suitable node of the electronic circuit.
This first method could be used in applications in which the signal to be handled, such as a speech signal intrinsically, contains no DC component and in which the electronic circuit cannot be interrupted in the course of operation. This is disclosed in papers entitled "A Single-Chip CMOS Filter/Codec)", on pp. 302 to 307, SC-16 of IEEE JOURNAL OF SOLID-STATE CIRCUITS (August, 1981).
In the second method, on the other hand, prior to the application of AC input signals to an electronic circuit, reference DC signals are inputted for a suitable time period and are detected from the electronic circuit. The DC signals for compensating or adjusting the output value to a suitable value are negatively fed back in a fixed manner to a suitable node of the electronic circuit. This second method is frequently used where the DC component itself contained in the output of the electronic circuit is handled as an important signal. The second method is disclosed in U.S. Pat. No. 5,061,900 (issued Oct. 29, 1991).